IRIS
GIORGI, ROBERTO
 Distribuzione geografica
Salva come PNG Salva come JPEG
Continente #
NA - Nord America 11.475
EU - Europa 9.814
AS - Asia 5.881
SA - Sud America 1.018
AF - Africa 281
OC - Oceania 23
Continente sconosciuto - Info sul continente non disponibili 20
Totale 28.512
Salva come PNG Salva come JPEG
Nazione #
US - Stati Uniti d'America 11.298
GB - Regno Unito 2.491
CN - Cina 2.112
RU - Federazione Russa 1.602
SG - Singapore 1.600
IE - Irlanda 1.247
IT - Italia 921
SE - Svezia 883
BR - Brasile 853
UA - Ucraina 831
FR - Francia 708
VN - Vietnam 638
HK - Hong Kong 515
DE - Germania 468
KR - Corea 313
FI - Finlandia 243
ZA - Sudafrica 145
IN - India 136
ES - Italia 123
BD - Bangladesh 116
CA - Canada 88
AR - Argentina 63
BE - Belgio 55
TR - Turchia 53
MX - Messico 52
NL - Olanda 49
AE - Emirati Arabi Uniti 48
IQ - Iraq 48
GR - Grecia 45
JP - Giappone 45
NG - Nigeria 45
PL - Polonia 38
PK - Pakistan 37
ID - Indonesia 30
AT - Austria 25
SA - Arabia Saudita 24
EC - Ecuador 21
HU - Ungheria 21
AU - Australia 20
CI - Costa d'Avorio 20
EU - Europa 20
MY - Malesia 20
UZ - Uzbekistan 19
CL - Cile 18
CO - Colombia 18
IR - Iran 17
VE - Venezuela 17
MA - Marocco 16
PH - Filippine 16
KE - Kenya 14
LT - Lituania 14
NP - Nepal 13
JM - Giamaica 11
OM - Oman 11
PY - Paraguay 11
RO - Romania 11
IL - Israele 10
JO - Giordania 10
TN - Tunisia 10
DZ - Algeria 8
UY - Uruguay 8
DO - Repubblica Dominicana 7
PE - Perù 7
PT - Portogallo 7
CY - Cipro 6
EG - Egitto 6
SN - Senegal 6
DK - Danimarca 5
KZ - Kazakistan 5
LB - Libano 5
NO - Norvegia 5
PA - Panama 5
AZ - Azerbaigian 4
CH - Svizzera 4
CR - Costa Rica 4
QA - Qatar 4
AM - Armenia 3
BH - Bahrain 3
CZ - Repubblica Ceca 3
ET - Etiopia 3
HN - Honduras 3
KW - Kuwait 3
LA - Repubblica Popolare Democratica del Laos 3
TT - Trinidad e Tobago 3
AL - Albania 2
BG - Bulgaria 2
CG - Congo 2
GA - Gabon 2
LK - Sri Lanka 2
LV - Lettonia 2
MD - Moldavia 2
MK - Macedonia 2
NZ - Nuova Zelanda 2
PS - Palestinian Territory 2
TH - Thailandia 2
TW - Taiwan 2
AO - Angola 1
BN - Brunei Darussalam 1
BO - Bolivia 1
BY - Bielorussia 1
Totale 28.494
Salva come PNG Salva come JPEG
Città #
Southend 2.276
Dublin 1.239
Fairfield 1.116
Dallas 939
Singapore 886
Ashburn 870
Chandler 832
Jacksonville 692
Woodbridge 532
Beijing 517
Hong Kong 481
Wilmington 479
Santa Clara 471
Ann Arbor 444
Houston 431
Seattle 421
Moscow 394
Cambridge 374
Siena 357
Hefei 321
Princeton 301
Seoul 295
San Jose 282
Nanjing 248
Ho Chi Minh City 182
The Dalles 177
Los Angeles 172
Hanoi 153
Lauterbourg 147
Johannesburg 131
Buffalo 99
Dearborn 97
Boardman 96
Dong Ket 94
Council Bluffs 87
Menlo Park 86
Milan 84
Nanchang 81
Málaga 74
Helsinki 73
Munich 68
New York 68
São Paulo 66
San Mateo 59
San Diego 55
Shenyang 53
Atlanta 52
Shanghai 50
Brussels 48
Changsha 48
Rome 46
Orem 45
Tianjin 45
Chicago 44
Norwalk 41
Abuja 40
Frankfurt am Main 38
London 37
Columbus 34
Hebei 34
Kunming 34
Haiphong 31
Tokyo 30
Jiaxing 29
Düsseldorf 28
Florence 28
Turku 28
Zhengzhou 27
Hangzhou 26
Jinan 26
Toronto 26
Warsaw 26
Guangzhou 25
Redondo Beach 25
Chennai 24
Rio de Janeiro 24
San Francisco 23
Denver 22
Amsterdam 21
Boston 21
Brooklyn 21
Abidjan 20
Baghdad 20
Bengaluru 20
Porto Alegre 20
Phoenix 19
Brasília 18
Izmir 18
Belo Horizonte 17
Da Nang 17
Falls Church 17
Redmond 17
Redwood City 17
Stockholm 17
Vienna 17
Mumbai 16
Ningbo 16
Poplar 16
Tashkent 16
Manchester 15
Totale 18.880
Salva come PNG Salva come JPEG
Nome #
BlueSign 2 319
AXIOM: A Flexible Platform for the Smart Home 302
A matrix multiplier case study for an evaluation of a configurable Dataflow-Machine 292
BlueSign Translator 287
Evaluation of a Coherence Protocol for Eliminating Passive Sharing in Shared-Bus Multithreaded Multiprocessors 286
A field experience for a vehicle recognition system using magnetic sensors 286
A performance evaluation of ARM ISA extension for elliptic curve cryptography over binary finite fields 283
AXIOM: A Hardware-Software Platform for Cyber Physical Systems 281
A workload characterization of elliptic curve cryptography methods in embedded environments 270
Making IoT with UDOO 266
The AXIOM platform for next-generation cyber physical systems 261
X86_64 vs Aarch64 Performance Validation with COTSon 259
Architectural Support for Fault Tolerance in a Teradevice Dataflow System 258
A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs 257
Guide to DataFlow Supercomputing 256
An FPGA-based Scalable Hardware Scheduler for Data-Flow Models 256
Exploiting Locality to Improve Leakage Reduction in Embedded Drowsy I-Caches at Same Area/Speed 256
A Clockless Computing System based on the Static Dataflow Paradigm 251
A scalable thread scheduling co-processor based on data-flow principles 248
A data-flow execution engine for scalable embedded computing 248
Analyzing the Impact of Operating System Activity of different Linux Distributions in a Distributed Environment 240
A design space exploration tool set for future 1K-core high-performance computers 237
DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model 236
AXIOM: a scalable, efficient and reconfigurable embedded platform 233
A Dynamic Load Balancer for a Cluster of FPGA SoCs 232
Scalable Embedded Computing through Reconfigurable Hardware: comparing DF-Threads, Cilk, OpenMPI and Jump 229
A fault detection and recovery architecture for a teradevice dataflow system 229
AXIOM: A 64-bit reconfigurable hardware/software platform for scalable embedded computing 227
Reconfigurable Logic Interface Architecture for CPU-FPGA Accelerators 226
Embedded reconfigurable computing: the ERA approach 223
A Multi-Pronged Approach to Benchmark Characterization 220
A Novel Architecture and Simulation for Executing Decoupled Threads in Future 1-Kilo-Core Chip 220
Dataflow Support in x86-64 Multicore Architectures through Small Hardware Extensions 215
Exploring future many-core architectures: the TERAFLUX evaluation framework 213
Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise: Designing a Computer Architecture via HLS) 213
Rapid Prototyping IoT Solutions Based on Machine Learning 208
Energy Efficiency Exploration on the ZYNQ Ultrascale+ 207
Dynamic Power Reduction in Self-Adaptive Embedded Systems through Benchmark Analysis 206
An introduction to DF-Threads and their Execution Model 206
Enhancing an x86_64 multi-core architecture with data-flow execution support 203
The AXIOM Project: IoT on Heterogeneous Embedded Platforms 203
The AXIOM project (Agile, eXtensible, fast I/O Module) 203
MEDEA '08: Proc. 2008 workshop on MEmory performance 202
Analysis of Sharing Overhead in Shared Memory Multiprocessors 202
A Workload Generation Environment for Trace-Driven Simulation of Shared-Bus Multiprocessor 199
Embedded reconfigurable architectures 197
From COTSon to HLS: translating timing into an architecture 197
Scheduled Dataflow: Execution paradigm, architecture, and performance evaluation 195
Epilogue to [Guide to dataflow supercomputing basic concepts, case studies and a detailed example] 195
Instruction Set Extensions for Cryptographic Applications 195
Simulation study of memory performance of SMP multiprocessors running a TPC-W workload 194
A Data-Flow Methodology for Accelerating FFT 194
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture 193
Scalable Embedded Systems: Towards the Convergence of High-Performance and Embedded Computing 193
BLUESIGN: traduttore multimediale portatile per non udenti 192
DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems 192
An example application: fourier transform 191
Postscript to [Guide to DataFlow Supercomputing Basic Concepts, Case Studies, and a Detailed Example] 191
Message from ESA-05 chairs 191
The AXIOM Software Layers 191
Filtering drowsy instruction cache to achieve better efficiency 190
TERAFLUX: Harnessing dataflow in next generation teradevices 189
Tiled Architectures & Recent Proposals for Chip Multiprocessors 188
A Case Study on the Design Trade-off of a Thread Level Data Flow based Many-core Architecture 187
Architectural Simulation in the Kilo-core Era 187
A Coherence Protocol for the Elimination of Passive Sharing in Single and Multiple Threaded Shared-Bus Shared-Memory Multiprocessors 187
Integration of simulators in virtual 3D computer science classroom 186
Special Section on Terascale Computing 185
An Educational Environment for Designing and Performance Tuning of Embedded Systems 181
Trace factory - Generating workloads for trace-driven simulation of shared-bus multiprocessors 179
TERAFLUX: Exploiting Tera-device Computing Challenges 178
Elliptic Curve Cryptography support for ARM based Embedded systems 176
Dynamically Reconfiguring through Phase Detection on FPGA 175
ERA - Embedded Reconfigurable Architectures 174
Cache Memory Design for Embedded Systems Based on Program Locality Analysis 174
Final Report and Documentation 173
Bridging a Data-Flow Execution Model to a Lightweight Programming Model 173
PSCR: A coherence protocol for eliminating passive sharing in shared-bus shared-memory multiprocessors 172
Reducing leakage in power-saving capable caches for embedded systems by using a filter cache 172
Modeling Multi-Board Communication in the AXIOM Cyber-Physical System 172
T-Star (T*): An x86-64 ISA Extension to support thread execution on many cores 170
WebRISC-V: A 32/64-bit RISC-V pipeline simulation tool 169
Sistema per la traduzione in Lingua Italiana dei Segni: Blue Sign Translator / Wireless Sign System 169
The TERAFLUX project: Exploiting the dataflow paradigm in next generation teradevices 169
An Iris+Voice Recognition System for a Smart Doorbell 169
L'Informatica per i sordi: su palmare la lingua dei segni 168
Fine-tuned TERAFLUX Execution Model 168
Exploring Dataflow-based Thread Level Parallelism in Cyber-physical Systems 168
Special track on embedded systems: Applications, solutions, and techniques 168
A Soft-IP for Performance Measuring of the Zynq Ultrascale+ CPU/FPGA interface 168
The AXIOM Software Layers 167
Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload 167
Reducing Leakage through Filter Cache 165
A Survey on Real-Time Object Detection on FPGAs 162
An Educational Environment for Program Behavior Analysis and Cache Memory Design 162
Memory Performance of Public-Key cryptography Methods in Mobile Environments 162
Execution and Cache Performance of the Scheduled Dataflow Architecture 161
Transactional Memory on a Dataflow Architecture for Accelerating Haskell 160
Using the WebIDE 159
Early results from ERA – Embedded Reconfigurable Architectures 159
Totale 20.663
Salva come PNG Salva come JPEG
Categoria #
all - tutte 85.479
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 85.479
Salva come PNG Salva come JPEG


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021230 0 0 0 0 0 0 0 0 0 0 0 230
2021/20222.145 114 232 240 297 101 49 89 65 98 199 186 475
2022/20232.945 206 252 389 463 234 568 53 212 278 108 99 83
2023/20241.659 82 40 106 79 59 401 621 62 5 55 32 117
2024/20253.542 65 201 257 166 375 185 38 300 240 170 378 1.167
2025/20268.463 780 1.220 782 947 1.751 366 1.117 377 342 369 260 152
Totale 29.011