IRIS
GIORGI, ROBERTO
 Distribuzione geografica
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Continente #
NA - Nord America 12.590
EU - Europa 10.517
AS - Asia 5.974
SA - Sud America 1.068
Continente sconosciuto - Info sul continente non disponibili 520
AF - Africa 283
OC - Oceania 23
Totale 30.975
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Nazione #
US - Stati Uniti d'America 12.381
GB - Regno Unito 2.498
CN - Cina 2.122
SG - Singapore 1.619
RU - Federazione Russa 1.602
IT - Italia 1.589
IE - Irlanda 1.248
SE - Svezia 885
BR - Brasile 868
UA - Ucraina 832
FR - Francia 712
VN - Vietnam 646
HK - Hong Kong 524
DE - Germania 471
KR - Corea 313
FI - Finlandia 243
IN - India 152
ZA - Sudafrica 146
BD - Bangladesh 125
ES - Italia 123
CA - Canada 99
AR - Argentina 75
BE - Belgio 55
MX - Messico 55
TR - Turchia 54
NL - Olanda 51
AE - Emirati Arabi Uniti 48
IQ - Iraq 48
GR - Grecia 45
JP - Giappone 45
NG - Nigeria 45
ID - Indonesia 38
PL - Polonia 38
PK - Pakistan 37
EC - Ecuador 30
CO - Colombia 29
SA - Arabia Saudita 26
AT - Austria 25
MY - Malesia 24
HU - Ungheria 21
AU - Australia 20
CI - Costa d'Avorio 20
EU - Europa 20
VE - Venezuela 20
PH - Filippine 19
UZ - Uzbekistan 19
CL - Cile 18
IR - Iran 17
MA - Marocco 16
KE - Kenya 14
LT - Lituania 14
NP - Nepal 14
JM - Giamaica 12
OM - Oman 11
PY - Paraguay 11
RO - Romania 11
IL - Israele 10
IS - Islanda 10
JO - Giordania 10
TN - Tunisia 10
CR - Costa Rica 8
DZ - Algeria 8
HN - Honduras 8
PT - Portogallo 8
UY - Uruguay 8
DO - Repubblica Dominicana 7
PE - Perù 7
CY - Cipro 6
DK - Danimarca 6
EG - Egitto 6
NO - Norvegia 6
SN - Senegal 6
KZ - Kazakistan 5
LB - Libano 5
PA - Panama 5
TT - Trinidad e Tobago 5
AZ - Azerbaigian 4
CH - Svizzera 4
NI - Nicaragua 4
QA - Qatar 4
TH - Thailandia 4
AL - Albania 3
AM - Armenia 3
BH - Bahrain 3
CZ - Repubblica Ceca 3
ET - Etiopia 3
KW - Kuwait 3
LA - Repubblica Popolare Democratica del Laos 3
BG - Bulgaria 2
CG - Congo 2
GA - Gabon 2
GT - Guatemala 2
KH - Cambogia 2
LK - Sri Lanka 2
LV - Lettonia 2
MD - Moldavia 2
MK - Macedonia 2
NZ - Nuova Zelanda 2
PS - Palestinian Territory 2
RS - Serbia 2
Totale 30.452
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Città #
Southend 2.276
Dublin 1.239
Fairfield 1.116
Ashburn 1.033
Dallas 958
Singapore 895
Chandler 832
Jacksonville 696
Woodbridge 534
Beijing 521
Santa Clara 508
Hong Kong 488
Wilmington 480
Milan 456
Ann Arbor 444
Houston 441
San Jose 440
Seattle 421
Moscow 394
Cambridge 374
Siena 359
Council Bluffs 331
Hefei 321
Princeton 301
Seoul 295
Nanjing 248
Los Angeles 189
Ho Chi Minh City 184
The Dalles 177
Rome 167
Hanoi 154
Lauterbourg 147
Johannesburg 131
Boardman 102
Buffalo 102
Dearborn 97
Dong Ket 94
Menlo Park 86
Nanchang 81
New York 76
Málaga 74
Helsinki 73
Munich 68
São Paulo 68
Chicago 59
San Mateo 59
Atlanta 57
San Diego 55
Columbus 53
Shenyang 53
Shanghai 52
Brussels 48
Changsha 48
Orem 45
Tianjin 45
Norwalk 41
Abuja 40
Frankfurt am Main 40
London 37
Florence 36
Hebei 34
Kunming 34
Figino 32
Haiphong 31
Tokyo 30
Jiaxing 29
Düsseldorf 28
Turku 28
Zhengzhou 27
Chennai 26
Hangzhou 26
Jinan 26
Toronto 26
Turin 26
Warsaw 26
Boston 25
Guangzhou 25
Redondo Beach 25
Brooklyn 24
Rio de Janeiro 24
San Francisco 24
Denver 23
Phoenix 23
Amsterdam 21
Abidjan 20
Baghdad 20
Bengaluru 20
Porto Alegre 20
Brasília 19
Da Nang 18
Izmir 18
Belo Horizonte 17
Falls Church 17
Redmond 17
Redwood City 17
Stockholm 17
Vienna 17
Mumbai 16
Naples 16
Ningbo 16
Totale 20.167
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Nome #
BlueSign 2 327
AXIOM: A Flexible Platform for the Smart Home 309
A field experience for a vehicle recognition system using magnetic sensors 301
BlueSign Translator 300
A performance evaluation of ARM ISA extension for elliptic curve cryptography over binary finite fields 298
A matrix multiplier case study for an evaluation of a configurable Dataflow-Machine 297
Evaluation of a Coherence Protocol for Eliminating Passive Sharing in Shared-Bus Multithreaded Multiprocessors 296
Making IoT with UDOO 288
AXIOM: A Hardware-Software Platform for Cyber Physical Systems 288
A workload characterization of elliptic curve cryptography methods in embedded environments 284
X86_64 vs Aarch64 Performance Validation with COTSon 282
Architectural Support for Fault Tolerance in a Teradevice Dataflow System 275
A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs 272
Guide to DataFlow Supercomputing 270
An FPGA-based Scalable Hardware Scheduler for Data-Flow Models 269
The AXIOM platform for next-generation cyber physical systems 268
Exploiting Locality to Improve Leakage Reduction in Embedded Drowsy I-Caches at Same Area/Speed 263
A data-flow execution engine for scalable embedded computing 263
A scalable thread scheduling co-processor based on data-flow principles 259
A Clockless Computing System based on the Static Dataflow Paradigm 259
DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model 248
Analyzing the Impact of Operating System Activity of different Linux Distributions in a Distributed Environment 247
AXIOM: a scalable, efficient and reconfigurable embedded platform 247
A design space exploration tool set for future 1K-core high-performance computers 242
A Dynamic Load Balancer for a Cluster of FPGA SoCs 242
Scalable Embedded Computing through Reconfigurable Hardware: comparing DF-Threads, Cilk, OpenMPI and Jump 241
AXIOM: A 64-bit reconfigurable hardware/software platform for scalable embedded computing 236
A fault detection and recovery architecture for a teradevice dataflow system 235
A Novel Architecture and Simulation for Executing Decoupled Threads in Future 1-Kilo-Core Chip 235
Reconfigurable Logic Interface Architecture for CPU-FPGA Accelerators 234
Embedded reconfigurable computing: the ERA approach 230
Energy Efficiency Exploration on the ZYNQ Ultrascale+ 229
A Multi-Pronged Approach to Benchmark Characterization 228
Dataflow Support in x86-64 Multicore Architectures through Small Hardware Extensions 227
Exploring future many-core architectures: the TERAFLUX evaluation framework 225
Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise: Designing a Computer Architecture via HLS) 225
Rapid Prototyping IoT Solutions Based on Machine Learning 222
Epilogue to [Guide to dataflow supercomputing basic concepts, case studies and a detailed example] 218
The AXIOM Project: IoT on Heterogeneous Embedded Platforms 217
An introduction to DF-Threads and their Execution Model 216
Enhancing an x86_64 multi-core architecture with data-flow execution support 216
MEDEA '08: Proc. 2008 workshop on MEmory performance 215
Analysis of Sharing Overhead in Shared Memory Multiprocessors 212
Tiled Architectures & Recent Proposals for Chip Multiprocessors 212
Dynamic Power Reduction in Self-Adaptive Embedded Systems through Benchmark Analysis 211
Instruction Set Extensions for Cryptographic Applications 211
Simulation study of memory performance of SMP multiprocessors running a TPC-W workload 209
Scalable Embedded Systems: Towards the Convergence of High-Performance and Embedded Computing 209
Postscript to [Guide to DataFlow Supercomputing Basic Concepts, Case Studies, and a Detailed Example] 209
A Data-Flow Methodology for Accelerating FFT 209
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture 208
The AXIOM project (Agile, eXtensible, fast I/O Module) 208
Embedded reconfigurable architectures 207
A Workload Generation Environment for Trace-Driven Simulation of Shared-Bus Multiprocessor 207
Message from ESA-05 chairs 206
From COTSon to HLS: translating timing into an architecture 206
Scheduled Dataflow: Execution paradigm, architecture, and performance evaluation 205
An example application: fourier transform 204
The AXIOM Software Layers 204
DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems 202
BLUESIGN: traduttore multimediale portatile per non udenti 199
A Coherence Protocol for the Elimination of Passive Sharing in Single and Multiple Threaded Shared-Bus Shared-Memory Multiprocessors 199
Filtering drowsy instruction cache to achieve better efficiency 198
Trace factory - Generating workloads for trace-driven simulation of shared-bus multiprocessors 197
Architectural Simulation in the Kilo-core Era 196
Final Report and Documentation 196
Integration of simulators in virtual 3D computer science classroom 196
An Educational Environment for Designing and Performance Tuning of Embedded Systems 195
A Case Study on the Design Trade-off of a Thread Level Data Flow based Many-core Architecture 195
TERAFLUX: Harnessing dataflow in next generation teradevices 195
Special Section on Terascale Computing 194
WebRISC-V: A 32/64-bit RISC-V pipeline simulation tool 191
TERAFLUX: Exploiting Tera-device Computing Challenges 191
PSCR: A coherence protocol for eliminating passive sharing in shared-bus shared-memory multiprocessors 186
Cache Memory Design for Embedded Systems Based on Program Locality Analysis 186
An Iris+Voice Recognition System for a Smart Doorbell 186
A Soft-IP for Performance Measuring of the Zynq Ultrascale+ CPU/FPGA interface 185
The TERAFLUX project: Exploiting the dataflow paradigm in next generation teradevices 184
Bridging a Data-Flow Execution Model to a Lightweight Programming Model 184
Elliptic Curve Cryptography support for ARM based Embedded systems 182
Dynamically Reconfiguring through Phase Detection on FPGA 182
Transactional Memory on a Dataflow Architecture for Accelerating Haskell 182
A Survey on Real-Time Object Detection on FPGAs 180
ERA - Embedded Reconfigurable Architectures 180
Sistema per la traduzione in Lingua Italiana dei Segni: Blue Sign Translator / Wireless Sign System 180
Exploring Dataflow-based Thread Level Parallelism in Cyber-physical Systems 180
An Educational Environment for Program Behavior Analysis and Cache Memory Design 179
Fine-tuned TERAFLUX Execution Model 178
Modeling Multi-Board Communication in the AXIOM Cyber-Physical System 178
L'Informatica per i sordi: su palmare la lingua dei segni 177
Reducing leakage in power-saving capable caches for embedded systems by using a filter cache 177
Execution and Cache Performance of the Scheduled Dataflow Architecture 177
Memory Performance of Public-Key cryptography Methods in Mobile Environments 177
Simulating a Multi-core x86_64 Architecture with Hardware ISA Extension Supporting a Data-Flow Execution Model 176
The AXIOM Software Layers 175
Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload 175
T-Star (T*): An x86-64 ISA Extension to support thread execution on many cores 174
Using the WebIDE 174
Reducing Leakage through Filter Cache 173
Early results from ERA – Embedded Reconfigurable Architectures 173
Totale 21.864
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Categoria #
all - tutte 91.464
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 91.464
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20221.799 0 0 240 297 101 49 89 65 98 199 186 475
2022/20232.945 206 252 389 463 234 568 53 212 278 108 99 83
2023/20241.659 82 40 106 79 59 401 621 62 5 55 32 117
2024/20253.542 65 201 257 166 375 185 38 300 240 170 378 1.167
2025/20269.151 780 1.220 782 947 1.751 366 1.117 377 342 369 260 840
2026/20271.276 409 374 493 0 0 0 0 0 0 0 0 0
Totale 30.975