ALIOTO, MASSIMO BRUNO CRIS
ALIOTO, MASSIMO BRUNO CRIS
Dipartimento di Ingegneria dell'Informazione e Scienze Matematiche
"EChO" Reconfigurable Power Management Unit for Energy Reduction in Sleep-Active Transitions
2013-01-01 Alioto, MASSIMO BRUNO CRIS; Elio, Consoli; Jan M., Rabaey
13.8 A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)
2014-01-01 Fabio, Frustaci; Mahmood, Khayatzadeh; David, Blaauw; Dennis, Sylvester; Alioto, MASSIMO BRUNO CRIS
45pW ESD clamp circuit for ultra-low power applicationsProceedings of the IEEE 2013 Custom Integrated Circuits Conference
2013-01-01 Yen Po, Chen; Yoonmyung, Lee; Jae Yoon, Sim; Alioto, MASSIMO BRUNO CRIS; David, Blaauw; Dennis, Sylvester
A Class of Maximum-Period Nonlinear Congruential Generators Derived From the Rényi Chaotic Map
2007-01-01 Addabbo, Tommaso; Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Pasini, Antonio; Rocchi, Santina; Vignoli, Valerio
A Design Methodology for High-Speed Low-Power MCML Frequency Dividers
2006-01-01 Alioto, MASSIMO BRUNO CRIS; R., Mita; G., Palumbo
A Feedback Strategy to Improve the Entropy of a Chaos-Based Random Bit Generator
2006-01-01 Addabbo, Tommaso; Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Rocchi, Santina; Vignoli, Valerio
A general model for differential power analysis attacks to static logic circuits
2008-01-01 Alioto, MASSIMO BRUNO CRIS; Poli, M; Rocchi, Santina
A general model of DPA attacks to precharged busses in symmetric-key cryptographic algorithms
2007-01-01 Alioto, MASSIMO BRUNO CRIS; Poli, Massimo; Rocchi, Santina; Vignoli, Valerio
A general power model of Differential Power Analysis attacks to static logic circuits
2010-01-01 Alioto, MASSIMO BRUNO CRIS; Poli, Massimo; Rocchi, Santina
A Novel Back-Biasing Low-Leakage Technique for FinFET Forced Stacks
2011-01-01 D., Baccarin; D., Esseni; Alioto, MASSIMO BRUNO CRIS
A scalable low-entropy detector to counteract the parameter variability effects in TRBGs
2010-01-01 Addabbo, Tommaso; Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Rocchi, Santina; Vignoli, Valerio
A Simple and Accurate Model of Input capacitance for Power Estimation in CMOS logic
2007-01-01 Alioto, MASSIMO BRUNO CRIS
A Simple Keeper Topology to Reduce Delay Variations in Nanometer Domino Logic
2012-01-01 Alioto, MASSIMO BRUNO CRIS; G., Palumbo; M., Pennisi
A Simple Strategy for Optimized Design of One-Level Carry-Skip Adders
2003-01-01 Alioto, MASSIMO BRUNO CRIS; Palumbo, G.
A technique to design high entropy chaos-based true random bit generators
2006-01-01 Addabbo, Tommaso; Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Rocchi, Santina; Vignoli, Valerio
A variability-tolerant feedback technique for throughput maximization of TRBGs with predefined entropy
2010-01-01 Addabbo, Tommaso; Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Rocchi, Santina; Vignoli, Valerio
Adiabatic Gates: a Critical Point of View
1999-01-01 Alioto, MASSIMO BRUNO CRIS; Palumbo, G.
An approach to the design of PFSCL gates
2005-01-01 Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Pancioni, Luca; Rocchi, Santina; Vignoli, Valerio
An Efficient Implementation of PRNGs Based on the Digital Sawtooth Map.
2004-01-01 Alioto, MASSIMO BRUNO CRIS; Bernardi, S.; Fort, Ada; Rocchi, Santina; Vignoli, Valerio
Analysis and Comparison in the Energy-Delay-Area Domain of Nanometer CMOS Flip-Flops: Part I - Methodology and Design Strategies
2011-01-01 Alioto, MASSIMO BRUNO CRIS; E., Consoli; G., Palumbo