ALIOTO, MASSIMO BRUNO CRIS

ALIOTO, MASSIMO BRUNO CRIS  

Dipartimento di Ingegneria dell'Informazione e Scienze Matematiche  

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Titolo Data di pubblicazione Autore(i) File Abstract
13.8 A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 1-gen-2014 Fabio, Frustaci; Mahmood, Khayatzadeh; David, Blaauw; Dennis, Sylvester; Alioto, MASSIMO BRUNO CRIS -
45pW ESD clamp circuit for ultra-low power applicationsProceedings of the IEEE 2013 Custom Integrated Circuits Conference 1-gen-2013 Yen Po, Chen; Yoonmyung, Lee; Jae Yoon, Sim; Alioto, MASSIMO BRUNO CRIS; David, Blaauw; Dennis, Sylvester -
A Class of Maximum-Period Nonlinear Congruential Generators Derived From the Rényi Chaotic Map 1-gen-2007 Addabbo, Tommaso; Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Pasini, Antonio; Rocchi, Santina; Vignoli, Valerio -
A Feedback Strategy to Improve the Entropy of a Chaos-Based Random Bit Generator 1-gen-2006 Addabbo, Tommaso; Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Rocchi, Santina; Vignoli, Valerio -
A Novel Back-Biasing Low-Leakage Technique for FinFET Forced Stacks 1-gen-2011 D., Baccarin; D., Esseni; Alioto, MASSIMO BRUNO CRIS -
A Simple and Accurate Model of Input capacitance for Power Estimation in CMOS logic 1-gen-2007 Alioto, MASSIMO BRUNO CRIS -
A variability-tolerant feedback technique for throughput maximization of TRBGs with predefined entropy 1-gen-2010 Addabbo, Tommaso; Alioto, MASSIMO BRUNO CRIS; Fort, Ada; Rocchi, Santina; Vignoli, Valerio -
Adiabatic Gates: a Critical Point of View 1-gen-1999 Alioto, MASSIMO BRUNO CRIS; Palumbo, G. -
An Efficient Implementation of PRNGs Based on the Digital Sawtooth Map. 1-gen-2004 Alioto, MASSIMO BRUNO CRIS; Bernardi, S.; Fort, Ada; Rocchi, Santina; Vignoli, Valerio -
Analysis and Comparison in the Energy-Delay-Area Domain of Nanometer CMOS Flip-Flops: Part I - Methodology and Design Strategies 1-gen-2011 Alioto, MASSIMO BRUNO CRIS; E., Consoli; G., Palumbo -
Analysis and Comparison in the Energy-Delay-Area Domain of Nanometer CMOS Flip-Flops: Part II – Results and Figures of Merit 1-gen-2011 Alioto, MASSIMO BRUNO CRIS; E., Consoli; G., Palumbo -
Analysis and Comparison on Full Adder Block in Sub-Micron Technology 1-gen-2002 Alioto, MASSIMO BRUNO CRIS; Palumbo, G. -
Analysis and design of digital PRNGS based on the discretized sawtooth map 1-gen-2003 Alioto, MASSIMO BRUNO CRIS; S., Bernardi; Fort, Ada; Rocchi, Santina; Vignoli, Valerio -
Analysis and design of MCML gates with hysteresis 1-gen-2006 Alioto, MASSIMO BRUNO CRIS; Pancioni, Luca; Rocchi, Santina; Vignoli, Valerio -
Analysis and Design of Ultra-Low Power Subthreshold MCML Gates 1-gen-2009 Alioto, MASSIMO BRUNO CRIS; Y., Leblebici -
Analysis and Evaluation of Layout Density of FinFET Logic Gates 1-gen-2009 Alioto, MASSIMO BRUNO CRIS -
Analysis and Modeling of Energy Consumption in RLC Tree Circuits 1-gen-2009 Alioto, MASSIMO BRUNO CRIS; G., Palumbo; M., Poli -
Analysis and performance evaluation of area-efficient true random bit generators on FPGAs 1-gen-2008 Alioto, MASSIMO BRUNO CRIS; Fondelli, L; Rocchi, Santina -
Analysis of Layout Density in FinFET Standard Cells and Impact of Fin Technology 1-gen-2010 Alioto, MASSIMO BRUNO CRIS -
Analysis of the impact of process variations on static logic circuits versus fan-in 1-gen-2008 Alioto, MASSIMO BRUNO CRIS; G., Palumbo; M., Pennisi -