A novel reconfigurable switched-capacitor "EChO" Power Management Unit is introduced for ultra-low power duty-cycled integrated systems (e.g., sensor nodes for critical event monitoring). "EChO" reduces the energy cost associated with sleep-to-active and active-to sleep transitions by 64% with an area overhead less than 1% and no impact on active mode operation. Analysis shows that approximately the same energy reduction is achieved over a very wide range of operating conditions and design constraints (e.g., ratio between flying and decoupling capacitances, granularity of the capacitor array). Measurements show 25-30% system power saving for a 65-nm testchip implementation of the "EChO" PMU powering a 16-kgate processing unit and a 2-kbit SRAM at 0.55-V voltage in active mode, assuming a 1-s wakeup cycle, 6.25-12.5% activity and a processing task of 250 cycles. The technique can be synergistically employed with traditional reconfiguration techniques that focus on efficiency in active mode (ignoring active-sleep transitions) to sum up the benefits. © 1966-2012 IEEE.
Alioto, M., Consoli, E., Rabaey, J.M. (2013). "EChO" Reconfigurable Power Management Unit for Energy Reduction in Sleep-Active Transitions. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 48(8), 1921-1932 [10.1109/JSSC.2013.2258816].
"EChO" Reconfigurable Power Management Unit for Energy Reduction in Sleep-Active Transitions
Alioto, Massimo;
2013-01-01
Abstract
A novel reconfigurable switched-capacitor "EChO" Power Management Unit is introduced for ultra-low power duty-cycled integrated systems (e.g., sensor nodes for critical event monitoring). "EChO" reduces the energy cost associated with sleep-to-active and active-to sleep transitions by 64% with an area overhead less than 1% and no impact on active mode operation. Analysis shows that approximately the same energy reduction is achieved over a very wide range of operating conditions and design constraints (e.g., ratio between flying and decoupling capacitances, granularity of the capacitor array). Measurements show 25-30% system power saving for a 65-nm testchip implementation of the "EChO" PMU powering a 16-kgate processing unit and a 2-kbit SRAM at 0.55-V voltage in active mode, assuming a 1-s wakeup cycle, 6.25-12.5% activity and a processing task of 250 cycles. The technique can be synergistically employed with traditional reconfiguration techniques that focus on efficiency in active mode (ignoring active-sleep transitions) to sum up the benefits. © 1966-2012 IEEE.File | Dimensione | Formato | |
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J63-“EChO” Reconfigurable Power Management Unit for Energy Reduction in Sleep-Active Transitions.pdf
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https://hdl.handle.net/11365/47195
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