In this paper, the guidelines to design a true random bit generator (TRBG) circuit with a predefined minimum entropy are discussed. The approach is proposed for a TRBG based on a one-dimensional piecewise-linear chaotic map; it does not require bit throughput reduction, and it is suitable for the development of integrated TRBG circuits. In particular, the proposed design strategy is based on a feedback control procedure that allows to dynamically change the system parameters for the correction of the circuit “nonidealities” (e.g., the circuit offsets). The correction algorithm does not require a direct measurement of the system “nonidealities” or of the effective value of the map parameters, but only a dynamic estimation of these quantities based on the observation of the TRBG output. The design approach is validated by a hardware prototype implemented on a field-programmable analog array. The results of the NIST FIPS 140–2 test suite, the DIEHARD test suite, and the Coron’s Universal test, applied to the TRBG output sequences before and after a simple post processing without throughput reduction, are reported and discussed.
Addabbo, T., Alioto, M.B.C., Fort, A., Rocchi, S., Vignoli, V. (2006). A Feedback Strategy to Improve the Entropy of a Chaos-Based Random Bit Generator. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, 53(2), 326-337 [10.1109/TCSI.2005.856670].
A Feedback Strategy to Improve the Entropy of a Chaos-Based Random Bit Generator
ADDABBO, TOMMASO;ALIOTO, MASSIMO BRUNO CRIS;FORT, ADA;ROCCHI, SANTINA;VIGNOLI, VALERIO
2006-01-01
Abstract
In this paper, the guidelines to design a true random bit generator (TRBG) circuit with a predefined minimum entropy are discussed. The approach is proposed for a TRBG based on a one-dimensional piecewise-linear chaotic map; it does not require bit throughput reduction, and it is suitable for the development of integrated TRBG circuits. In particular, the proposed design strategy is based on a feedback control procedure that allows to dynamically change the system parameters for the correction of the circuit “nonidealities” (e.g., the circuit offsets). The correction algorithm does not require a direct measurement of the system “nonidealities” or of the effective value of the map parameters, but only a dynamic estimation of these quantities based on the observation of the TRBG output. The design approach is validated by a hardware prototype implemented on a field-programmable analog array. The results of the NIST FIPS 140–2 test suite, the DIEHARD test suite, and the Coron’s Universal test, applied to the TRBG output sequences before and after a simple post processing without throughput reduction, are reported and discussed.File | Dimensione | Formato | |
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https://hdl.handle.net/11365/21497
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