Adaptive Cache Decay

Leakage power in data cache memories represents a sizable fraction of total power consumption, and many techniques have been proposed to reduce it. Previous techniques put unused lines for example to drowsy state or switch them off completely (cache decay) in order to save power. Our idea is to adaptively select mostly used cache lines. We found that this can be achieved automatically by using a tiny cache acting as a filter L0 cache. Our experiments, with complete MiBench suite for ARM based processor, show 13\% improvement in leakage saving and 21\% in EDP versus drowsy cache and 52\% improvement in leakage saving and 65\% in EDP versus cache decay (in average).