Decoupled Threaded Architecture (DTA) is designed to exploit Thread Level Parallelism (TLP) by using a sea of simple cores grouped into cluster for providing a scalable solution that copes with wire delay. Our goals are i) to provide an aggressive mechanisms for decoupling memory accesses deriving from simple and complex data structures; ii) to implement a non-blocking execution of the threads. Here we illustrate some of the concepts related to our research in implementing DTA.
Giorgi, R., Popovic, Z., Puzovic, N. (2007). Decoupled Threaded Architecture. In ACACES 2007 (pp.119-122). Academic Press.
Decoupled Threaded Architecture
Giorgi, R.;
2007-01-01
Abstract
Decoupled Threaded Architecture (DTA) is designed to exploit Thread Level Parallelism (TLP) by using a sea of simple cores grouped into cluster for providing a scalable solution that copes with wire delay. Our goals are i) to provide an aggressive mechanisms for decoupling memory accesses deriving from simple and complex data structures; ii) to implement a non-blocking execution of the threads. Here we illustrate some of the concepts related to our research in implementing DTA.
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https://hdl.handle.net/11365/46857
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