In this paper, the sawtooth map in its digital implementation is investigated as a source of pseudorandom binary numbers. Effects of precision in the arithmetic blocks used to implement the map, as well as approximation strategies and value of the map slope are discussed in terms of period and statistical properties of bits generated. Optimum values of design parameters to achieve a good quality of output bit sequences are identified, and an area-efficient implementation on a programmable device is discussed. Comparison to traditional PRNGs based on Linear-Feedback Shift Registers shows that the discretized sawtooth map is a viable solution for implementing integrated PRNG circuits.
Alioto, M.B.C., S., B., Fort, A., Rocchi, S., Vignoli, V. (2003). Analysis and design of digital PRNGS based on the discretized sawtooth map. In Proceedings of the 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003) (pp.427-430). New York : IEEE [10.1109/ICECS.2003.1301813].
Analysis and design of digital PRNGS based on the discretized sawtooth map
ALIOTO, MASSIMO BRUNO CRIS;FORT, ADA;ROCCHI, SANTINA;VIGNOLI, VALERIO
2003-01-01
Abstract
In this paper, the sawtooth map in its digital implementation is investigated as a source of pseudorandom binary numbers. Effects of precision in the arithmetic blocks used to implement the map, as well as approximation strategies and value of the map slope are discussed in terms of period and statistical properties of bits generated. Optimum values of design parameters to achieve a good quality of output bit sequences are identified, and an area-efficient implementation on a programmable device is discussed. Comparison to traditional PRNGs based on Linear-Feedback Shift Registers shows that the discretized sawtooth map is a viable solution for implementing integrated PRNG circuits.File | Dimensione | Formato | |
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https://hdl.handle.net/11365/33562
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