In this paper, the guidelines to design a true random number generator (TRNG) circuit of uniform distributed numbers. The approach is proposed for a TRNG based on a one-dimensional piecewise-linear chaotic map and it is suitable for the development of integrated TRNG circuits. In particular, the proposed design strategy is based on a feedback control procedure that allows to dynamically change the system parameters for the correction of the circuit "non-idealities" (e.g. the circuit offsets). The correction algorithm does not require a direct measurement of the system "non-idealities" or of the effective value of the map parameters, but only a dynamic estimation of these quantities based on the observation of the TRNG output. The design approach is validated by a hardware prototype implemented on a field programmable analog array (FPAA)
Addabbo, T., Alioto, M.B.C., Fort, A., Rocchi, S., Vignoli, V. (2006). Uniform-Distributed Noise Generator Based on a Chaotic Circuit. In Proceedings of the 2006 IEEE Instrumentation and Measurement Technology Conference (IMTC 2006) (pp.1156-1160) [10.1109/IMTC.2006.235356].
Uniform-Distributed Noise Generator Based on a Chaotic Circuit
ADDABBO, TOMMASO;ALIOTO, MASSIMO BRUNO CRIS;FORT, ADA;ROCCHI, SANTINA;VIGNOLI, VALERIO
2006-01-01
Abstract
In this paper, the guidelines to design a true random number generator (TRNG) circuit of uniform distributed numbers. The approach is proposed for a TRNG based on a one-dimensional piecewise-linear chaotic map and it is suitable for the development of integrated TRNG circuits. In particular, the proposed design strategy is based on a feedback control procedure that allows to dynamically change the system parameters for the correction of the circuit "non-idealities" (e.g. the circuit offsets). The correction algorithm does not require a direct measurement of the system "non-idealities" or of the effective value of the map parameters, but only a dynamic estimation of these quantities based on the observation of the TRNG output. The design approach is validated by a hardware prototype implemented on a field programmable analog array (FPAA)File | Dimensione | Formato | |
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https://hdl.handle.net/11365/3308
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