Explicit Energy Evaluation in RLC Tree Circuits with Ramp Inputs

In this paper, a simple and accurate model of the energy consumption in RLC trees with ramp inputs is proposed. The modeling approach is based on the reduction of the RLC tree network to a proper 2(nd)-order RLC equivalent circuit, according to the strategy proposed by the same authors in [1]. This approach leads to a closed-form expression of the energy consumption that allows for a deeper understanding of the contribution of the inductance, as well as of the effect of the input rise time. Thanks to its simplicity, the model is well suited for fast energy estimations. Extensive simulations show that the proposed approach is faster than SPICE simulations by four orders of magnitude. At the same time, the proposed approach provides results that are very close to SPICE simulations, with a typical error of 1.5%.