PROCACCINI, MARCO
PROCACCINI, MARCO
Dipartimento di Ingegneria dell'Informazione e Scienze Matematiche
A data-flow execution engine for scalable embedded computing
2017-01-01 Procaccini, Marco; Giorgi, Roberto
A design space exploration tool set for future 1K-core high-performance computers
2019-01-01 Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco
An Extended Tracing System for the COTSon Simulator
2020-01-01 Procaccini, Marco; Giorgi, Roberto
An FPGA-based Scalable Hardware Scheduler for Data-Flow Models
2018-01-01 Procaccini, Marco; KHALILI MAYBODI, Farnam; Giorgi, Roberto
Analyzing the Impact of Operating System Activity of different Linux Distributions in a Distributed Environment
2019-01-01 Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco
AXIOM: a scalable, efficient and reconfigurable embedded platform
2019-01-01 Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco
Bridging a Data-Flow Execution Model to a Lightweight Programming Model
2019-01-01 Giorgi, Roberto; Procaccini, Marco
Distributed large-scale graph processing on FPGAs
2023-01-01 Sahebi, Amin; Barbone, Marco; Procaccini, Marco; Luk, Wayne; Gaydadjiev, Georgi; Giorgi, Roberto
DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model
2021-01-01 Giorgi, Roberto; Sahebi, Amin; Procaccini, Marco
Energy Efficiency Exploration on the ZYNQ Ultrascale+
2018-01-01 Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco
From COTSon to HLS: translating timing into an architecture
2018-01-01 Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco
Reconfigurable Logic Interface Architecture for CPU-FPGA Accelerators
2018-01-01 KHALILI MAYBODI, Farnam; Giorgi, Roberto; Procaccini, Marco
The AXIOM Project: IoT on Heterogeneous Embedded Platforms
2021-01-01 Filgueras, Antonio; Vidal, Miquel; Mateu, Marc; Jimenez-Gonzalez, Daniel; Alvarez, Carlos; Martorell, Xavier; Ayguade', Eduard; Theodoropoulos, Dimitrios; Pnevmatikatos, Dionisios; Gai, Paolo; Garzarella, Stefano; Oro, David; Hernando, Javier; Bettin, Nicola; Pomella, Alberto; Procaccini, Marco; Giorgi, Roberto
Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise: Designing a Computer Architecture via HLS)
2019-01-01 Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco
X86_64 vs Aarch64 Performance Validation with COTSon
2019-01-01 Giorgi, Roberto; Procaccini, Marco
| Titolo | Data di pubblicazione | Autore(i) | File | Abstract |
|---|---|---|---|---|
| A data-flow execution engine for scalable embedded computing | 1-gen-2017 | Procaccini, Marco; Giorgi, Roberto | - | |
| A design space exploration tool set for future 1K-core high-performance computers | 1-gen-2019 | Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco | - | |
| An Extended Tracing System for the COTSon Simulator | 1-gen-2020 | Procaccini, Marco; Giorgi, Roberto | - | |
| An FPGA-based Scalable Hardware Scheduler for Data-Flow Models | 1-gen-2018 | Procaccini, Marco; KHALILI MAYBODI, Farnam; Giorgi, Roberto | - | |
| Analyzing the Impact of Operating System Activity of different Linux Distributions in a Distributed Environment | 1-gen-2019 | Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco | - | |
| AXIOM: a scalable, efficient and reconfigurable embedded platform | 1-gen-2019 | Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco | - | |
| Bridging a Data-Flow Execution Model to a Lightweight Programming Model | 1-gen-2019 | Giorgi, Roberto; Procaccini, Marco | - | |
| Distributed large-scale graph processing on FPGAs | 1-gen-2023 | Sahebi, Amin; Barbone, Marco; Procaccini, Marco; Luk, Wayne; Gaydadjiev, Georgi; Giorgi, Roberto | - | |
| DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model | 1-gen-2021 | Giorgi, Roberto; Sahebi, Amin; Procaccini, Marco | - | |
| Energy Efficiency Exploration on the ZYNQ Ultrascale+ | 1-gen-2018 | Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco | - | |
| From COTSon to HLS: translating timing into an architecture | 1-gen-2018 | Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco | - | |
| Reconfigurable Logic Interface Architecture for CPU-FPGA Accelerators | 1-gen-2018 | KHALILI MAYBODI, Farnam; Giorgi, Roberto; Procaccini, Marco | - | |
| The AXIOM Project: IoT on Heterogeneous Embedded Platforms | 1-gen-2021 | Filgueras, Antonio; Vidal, Miquel; Mateu, Marc; Jimenez-Gonzalez, Daniel; Alvarez, Carlos; Martorell, Xavier; Ayguade', Eduard; Theodoropoulos, Dimitrios; Pnevmatikatos, Dionisios; Gai, Paolo; Garzarella, Stefano; Oro, David; Hernando, Javier; Bettin, Nicola; Pomella, Alberto; Procaccini, Marco; Giorgi, Roberto | - | |
| Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise: Designing a Computer Architecture via HLS) | 1-gen-2019 | Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco | - | |
| X86_64 vs Aarch64 Performance Validation with COTSon | 1-gen-2019 | Giorgi, Roberto; Procaccini, Marco | - |