Sfoglia per Autore
Reconfigurable Logic Interface Architecture for CPU-FPGA Accelerators
2018-01-01 KHALILI MAYBODI, Farnam; Giorgi, Roberto; Procaccini, Marco
From COTSon to HLS: translating timing into an architecture
2018-01-01 Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco
Scalable Embedded Computing through Reconfigurable Hardware: comparing DF-Threads, Cilk, OpenMPI and Jump
2018-01-01 Giorgi, Roberto
Energy Efficiency Exploration on the ZYNQ Ultrascale+
2018-01-01 Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco
Rapid Prototyping IoT Solutions Based on Machine Learning
2017-01-01 Rizzo, Antonio; Montefoschi, Francesco; Caporali, Maurizio; Gisondi, Antonio; Burresi, Giovanni; Giorgi, Roberto
A data-flow execution engine for scalable embedded computing
2017-01-01 Procaccini, Marco; Giorgi, Roberto
Exploring future many-core architectures: the TERAFLUX evaluation framework
2017-01-01 Giorgi, Roberto
AXIOM: A 64-bit reconfigurable hardware/software platform for scalable embedded computing
2017-01-01 Giorgi, R.
AXIOM: A Flexible Platform for the Smart Home
2017-01-01 Giorgi, Roberto; Bettin, Nicola; Gai, Paolo; Martorell, Xavier; Rizzo, Antonio
The AXIOM platform for next-generation cyber physical systems
2017-01-01 Theodoropoulos, Dimitris; Mazumdar, Somnath; Ayguade, Eduard; Bettin, Nicola; Bueno, Javier; Ermini, Sara; Filgueras, Antonio; Jiménez-González, Daniel; à lvarez MartÃnez, Carlos; Martorell, Xavier; Montefoschi, Francesco; Oro, David; Pnevmatikatos, Dionisis; Rizzo, Antonio; Gai, Paolo; Garzarella, Stefano; Morelli, Bruno; Pomella, Alberto; Giorgi, Roberto
A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs
2016-01-01 Verdoscia, L.; Giorgi, R.
The AXIOM Software Layers
2016-01-01 Alvarez, C.; Ayguade, E.; Bosch, J.; Bueno, J.; Cherkashin, A.; Filgueras, A.; Jiminez-Gonzalez, D.; Martorell, X.; Navarro, N.; Vidal, M.; Theodoropoulos, D.; Pnevmatikatos, D.; Catani, D.; Oro, D.; Fernandez, C.; Segura, C.; Rodriguez, J.; Hernando, J.; Scordino, C.; Gai, P.; Passera, P.; Pomella, A.; Bettin, N.; Rizzo, A.; Giorgi, R.
Architectural Support for Fault Tolerance in a Teradevice Dataflow System
2016-01-01 Weis, S.; Garbade, A.; Fechner, B.; Mendelson, A.; Giorgi, R.; Ungerer, T.
Making IoT with UDOO
2016-01-01 Rizzo, Antonio; Burresi, Giovanni; Montefoschi, Francesco; Caporali, Maurizio; Giorgi, Roberto
Exploring Dataflow-based Thread Level Parallelism in Cyber-physical Systems
2016-01-01 Giorgi, Roberto
AXIOM: A Hardware-Software Platform for Cyber Physical Systems
2016-01-01 Mazumdar, S.; Ayguade, E.; Bettin, N.; Bueno, J.; Ermini, S.; Filgueras, A.; Jimenez Gonzalez, D.; Martinez, C. A.; Martorell, X.; Montefoschi, F.; Oro, D.; Pnevmatikatos, D.; Rizzo, A.; Theodoropoulos, D.; Giorgi, R.
Modeling Multi-Board Communication in the AXIOM Cyber-Physical System
2016-01-01 Giorgi, Roberto; Mazumdar, Somnath; Viola, Stefano; Gai, Paolo; Garzarella, Stefano; Morelli, Bruno; Pnevmatikatos, Dionisios; Theodoropoulos, Dimitris; Alvarez, Carlos; Ayguade, Eduard; Bueno, Javier; Filgueras, Antonio; Jimenez Gonzalez, Daniel; Martorell, Xavier
Simulating next-generation cyber-physical computing platforms
2016-01-01 Burgio, P.; Alvarez, C.; Ayguadé, E.; Filgueras, A.; Jimenez-Gonzalez, D.; Martorell, X.; Navarro, N.; Giorgi, R.
Transactional Memory on a Dataflow Architecture for Accelerating Haskell
2015-01-01 Giorgi, Roberto
Accelerating Haskell on a Dataflow Architecture: a case study including Transactional Memory
2015-01-01 Giorgi, Roberto
Titolo | Data di pubblicazione | Autore(i) | File | Abstract |
---|---|---|---|---|
Reconfigurable Logic Interface Architecture for CPU-FPGA Accelerators | 1-gen-2018 | KHALILI MAYBODI, Farnam; Giorgi, Roberto; Procaccini, Marco | - | |
From COTSon to HLS: translating timing into an architecture | 1-gen-2018 | Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco | - | |
Scalable Embedded Computing through Reconfigurable Hardware: comparing DF-Threads, Cilk, OpenMPI and Jump | 1-gen-2018 | Giorgi, Roberto | - | |
Energy Efficiency Exploration on the ZYNQ Ultrascale+ | 1-gen-2018 | Giorgi, Roberto; KHALILI MAYBODI, Farnam; Procaccini, Marco | - | |
Rapid Prototyping IoT Solutions Based on Machine Learning | 1-gen-2017 | Rizzo, Antonio; Montefoschi, Francesco; Caporali, Maurizio; Gisondi, Antonio; Burresi, Giovanni; Giorgi, Roberto | - | |
A data-flow execution engine for scalable embedded computing | 1-gen-2017 | Procaccini, Marco; Giorgi, Roberto | - | |
Exploring future many-core architectures: the TERAFLUX evaluation framework | 1-gen-2017 | Giorgi, Roberto | - | |
AXIOM: A 64-bit reconfigurable hardware/software platform for scalable embedded computing | 1-gen-2017 | Giorgi, R. | - | |
AXIOM: A Flexible Platform for the Smart Home | 1-gen-2017 | Giorgi, Roberto; Bettin, Nicola; Gai, Paolo; Martorell, Xavier; Rizzo, Antonio | - | |
The AXIOM platform for next-generation cyber physical systems | 1-gen-2017 | Theodoropoulos, Dimitris; Mazumdar, Somnath; Ayguade, Eduard; Bettin, Nicola; Bueno, Javier; Ermini, Sara; Filgueras, Antonio; Jiménez-González, Daniel; à lvarez MartÃnez, Carlos; Martorell, Xavier; Montefoschi, Francesco; Oro, David; Pnevmatikatos, Dionisis; Rizzo, Antonio; Gai, Paolo; Garzarella, Stefano; Morelli, Bruno; Pomella, Alberto; Giorgi, Roberto | - | |
A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs | 1-gen-2016 | Verdoscia, L.; Giorgi, R. | - | |
The AXIOM Software Layers | 1-gen-2016 | Alvarez, C.; Ayguade, E.; Bosch, J.; Bueno, J.; Cherkashin, A.; Filgueras, A.; Jiminez-Gonzalez, D.; Martorell, X.; Navarro, N.; Vidal, M.; Theodoropoulos, D.; Pnevmatikatos, D.; Catani, D.; Oro, D.; Fernandez, C.; Segura, C.; Rodriguez, J.; Hernando, J.; Scordino, C.; Gai, P.; Passera, P.; Pomella, A.; Bettin, N.; Rizzo, A.; Giorgi, R. | - | |
Architectural Support for Fault Tolerance in a Teradevice Dataflow System | 1-gen-2016 | Weis, S.; Garbade, A.; Fechner, B.; Mendelson, A.; Giorgi, R.; Ungerer, T. | - | |
Making IoT with UDOO | 1-gen-2016 | Rizzo, Antonio; Burresi, Giovanni; Montefoschi, Francesco; Caporali, Maurizio; Giorgi, Roberto | - | |
Exploring Dataflow-based Thread Level Parallelism in Cyber-physical Systems | 1-gen-2016 | Giorgi, Roberto | - | |
AXIOM: A Hardware-Software Platform for Cyber Physical Systems | 1-gen-2016 | Mazumdar, S.; Ayguade, E.; Bettin, N.; Bueno, J.; Ermini, S.; Filgueras, A.; Jimenez Gonzalez, D.; Martinez, C. A.; Martorell, X.; Montefoschi, F.; Oro, D.; Pnevmatikatos, D.; Rizzo, A.; Theodoropoulos, D.; Giorgi, R. | - | |
Modeling Multi-Board Communication in the AXIOM Cyber-Physical System | 1-gen-2016 | Giorgi, Roberto; Mazumdar, Somnath; Viola, Stefano; Gai, Paolo; Garzarella, Stefano; Morelli, Bruno; Pnevmatikatos, Dionisios; Theodoropoulos, Dimitris; Alvarez, Carlos; Ayguade, Eduard; Bueno, Javier; Filgueras, Antonio; Jimenez Gonzalez, Daniel; Martorell, Xavier | - | |
Simulating next-generation cyber-physical computing platforms | 1-gen-2016 | Burgio, P.; Alvarez, C.; Ayguadé, E.; Filgueras, A.; Jimenez-Gonzalez, D.; Martorell, X.; Navarro, N.; Giorgi, R. | - | |
Transactional Memory on a Dataflow Architecture for Accelerating Haskell | 1-gen-2015 | Giorgi, Roberto | - | |
Accelerating Haskell on a Dataflow Architecture: a case study including Transactional Memory | 1-gen-2015 | Giorgi, Roberto | - |
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