We have proposed a digital frequency measurement technique with enhanced accuracy, exploiting FPGA Mixed-Mode Clock Management for QCM-D technology. In detail, the method is based on the multi-phase generalization of the basic direct period measurement technique, involving low-complexity digital architectures based on gated counters. Theoretical analysis has been validated by experimental results, referring to a design implemented on a Xilinx Artix-7 FPGA. The proposed solution allowed to reach a worst-case frequency measurement error of ≈ 20Hz for an observation period of 200μs of a damped QCM sensor resonating at 10MHz.
Addabbo, T., Fort, A., Moretti, R., Spinelli, F., Vignoli, V. (2023). Multi-Phase Frequency Measurement Exploiting FPGA Mixed-Mode Clock Management for QCM-D Technology. In 2023 IEEE International Symposium on Circuits and Systems (ISCAS) (pp.1-5). New York : Institute of Electrical and Electronics Engineers Inc. [10.1109/ISCAS46773.2023.10182088].
Multi-Phase Frequency Measurement Exploiting FPGA Mixed-Mode Clock Management for QCM-D Technology
Addabbo T.;Fort A.;Moretti R.;Spinelli F.;Vignoli V.
2023-01-01
Abstract
We have proposed a digital frequency measurement technique with enhanced accuracy, exploiting FPGA Mixed-Mode Clock Management for QCM-D technology. In detail, the method is based on the multi-phase generalization of the basic direct period measurement technique, involving low-complexity digital architectures based on gated counters. Theoretical analysis has been validated by experimental results, referring to a design implemented on a Xilinx Artix-7 FPGA. The proposed solution allowed to reach a worst-case frequency measurement error of ≈ 20Hz for an observation period of 200μs of a damped QCM sensor resonating at 10MHz.File | Dimensione | Formato | |
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https://hdl.handle.net/11365/1241674