We discuss the design of an area-efficient CMOS analog core-cell implementing a PUF derived from a two-neurons Cellular Neural Network (CNN). The study is based on both theoretical modeling and numerical simulations, proposing circuit solutions in which the area consumption is strongly reduced by eliminating state capacitors and relying on distributed parasitic capacitances only.
Addabbo, T., Fort, A., Moretti, R., Mugnaini, M., Takaloo, H., Vignoli, V. (2020). Design of Area-Efficient Physical Unclonable Functions Derived from CNNs: Trade-Offs and Optimization. In 2020 European Conference on Circuit Theory and Design (ECCTD). New York : Institute of Electrical and Electronics Engineers Inc. [10.1109/ECCTD49232.2020.9218316].
Design of Area-Efficient Physical Unclonable Functions Derived from CNNs: Trade-Offs and Optimization
Addabbo T.
;Fort A.;Moretti R.;Mugnaini M.;Takaloo H.;Vignoli V.
2020-01-01
Abstract
We discuss the design of an area-efficient CMOS analog core-cell implementing a PUF derived from a two-neurons Cellular Neural Network (CNN). The study is based on both theoretical modeling and numerical simulations, proposing circuit solutions in which the area consumption is strongly reduced by eliminating state capacitors and relying on distributed parasitic capacitances only.
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https://hdl.handle.net/11365/1122890