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The main purpose of this work is to investigate the characteristics of a 180nm CMOS technology with high voltage (HV) option in view of the fabrication of a dual-tier, low material budget sensor for charged particle detection. For this purpose, an array of avalanche pixels has been designed. The array includes sensors with a pitch of 50 mu m x 100 mu m, different sizes (20 mu m x 20 mu m, 30 mu m x 30 mu m and 40 mu m x 36 mu m) and different process layers. Active and passive quenching techniques to suppress the avalanche have been implemented in the frontend electronics, which is integrated in the same substrate as the sensor. The paper presents the results from the characterization of the test chip in terms of breakdown voltage and dark count rate (DCR).

Musacci, M., Brogi, P., Collazuol, G., Betta, G.F.D., Ficorella, A., Lodola, L., et al. (2016). Geiger-mode Avalanche Pixels in 180 nm HV CMOS Process for a Dual-layer Particle Detector. In 2016 IEEE NUCLEAR SCIENCE SYMPOSIUM, MEDICAL IMAGING CONFERENCE AND ROOM-TEMPERATURE SEMICONDUCTOR DETECTOR WORKSHOP (NSS/MIC/RTSD). New York : IEEE [10.1109/NSSMIC.2016.8069765].

Geiger-mode Avalanche Pixels in 180 nm HV CMOS Process for a Dual-layer Particle Detector

Brogi, P.;Marrocchesi, P. S.;
2016-01-01

Abstract

The main purpose of this work is to investigate the characteristics of a 180nm CMOS technology with high voltage (HV) option in view of the fabrication of a dual-tier, low material budget sensor for charged particle detection. For this purpose, an array of avalanche pixels has been designed. The array includes sensors with a pitch of 50 mu m x 100 mu m, different sizes (20 mu m x 20 mu m, 30 mu m x 30 mu m and 40 mu m x 36 mu m) and different process layers. Active and passive quenching techniques to suppress the avalanche have been implemented in the frontend electronics, which is integrated in the same substrate as the sensor. The paper presents the results from the characterization of the test chip in terms of breakdown voltage and dark count rate (DCR).
2016
978-1-5090-1642-6
Musacci, M., Brogi, P., Collazuol, G., Betta, G.F.D., Ficorella, A., Lodola, L., et al. (2016). Geiger-mode Avalanche Pixels in 180 nm HV CMOS Process for a Dual-layer Particle Detector. In 2016 IEEE NUCLEAR SCIENCE SYMPOSIUM, MEDICAL IMAGING CONFERENCE AND ROOM-TEMPERATURE SEMICONDUCTOR DETECTOR WORKSHOP (NSS/MIC/RTSD). New York : IEEE [10.1109/NSSMIC.2016.8069765].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11365/1073280