Thanks to the improvements in semiconductor technologies, extreme-scale systems such as teradevices (i.e., composed by 1000 billion of transistors) will enable systems with 1000+ general purpose cores per chip, probably by 2020. Three major challenges have been identified: programmability, manageable architecture design, and reliability. TERAFLUX is a Future and Emerging Technology (FET) large-scale project funded by the European Union, which addresses such challenges at once by leveraging the dataflow principles. This paper describes the project and provides an overview of the research carried out by the TERAFLUX consortium. © 2013 IEEE.
M., S., R., B., F., B., A., C., P., E., P., F., et al. (2013). The TERAFLUX project: Exploiting the dataflow paradigm in next generation teradevices. In Proceedings - 16th Euromicro Conference on Digital System Design, DSD 2013 (pp.272-279) [10.1109/DSD.2013.39].
The TERAFLUX project: Exploiting the dataflow paradigm in next generation teradevices
GIORGI, ROBERTO
2013-01-01
Abstract
Thanks to the improvements in semiconductor technologies, extreme-scale systems such as teradevices (i.e., composed by 1000 billion of transistors) will enable systems with 1000+ general purpose cores per chip, probably by 2020. Three major challenges have been identified: programmability, manageable architecture design, and reliability. TERAFLUX is a Future and Emerging Technology (FET) large-scale project funded by the European Union, which addresses such challenges at once by leveraging the dataflow principles. This paper describes the project and provides an overview of the research carried out by the TERAFLUX consortium. © 2013 IEEE.
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https://hdl.handle.net/11365/46797
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