Sfoglia per Serie IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS
Mostrati risultati da 1 a 9 di 9
A CMOS PUF circuit primitive based on a two-dimensional nonlinear dynamical system
2019-01-01 Addabbo, T.; Di Marco, M.; Fort, A.; Mugnaini, M.; Takaloo, H.; Vignoli, V.
High-Speed/Low-Power Mixed Full Adder Chains: Analysis and Comparison versus Technology
2007-01-01 Alioto, M.; Palumbo, G.
Leakage Power Analysis Attacks: Effectiveness on DPA Resistant Logic Styles under Process Variations
2011-01-01 Djukanovic, Milena; Giancane, Luca; Scotti, Giuseppe; Trifiletti, Alessandro; Alioto, Massimo
Lightweight true random bit generators in PLDs: figures of merit and performance comparison
2019-01-01 Addabbo, T.; Fort, A.; Moretti, R.; Mugnaini, M.; Vignoli, V.; Garcia-Bosque, M.
Piecewise linear chaotic maps in current mode CMOS circuits: nonlinear distortion analysis
2019-01-01 Addabbo, T.; Fort, A.; Mugnaini, M.; Takaloo, H.; Vignoli, V.; Petra, N.
A Simple Keeper Topology to Reduce Delay Variations in Nanometer Domino Logic
2012-01-01 Alioto, Massimo; Palumbo, Gaetano; Pennisi, Melita
State equations of memristor circuits with nonlinear lossless elements in the Flux-charge domain
2019-01-01 Di Marco, M.; Forti, M.; Corinto, F.; Gilli, M.
Targeting multistable dynamics in a second-order memristor circuit
2020-01-01 Di Marco, M.; Forti, M.; Innocenti, G.; Tesi, A.; Corinto, F.
Transient control in targeting multistable dynamics of a memristor circuit
2021-01-01 Di Marco, M.; Forti, M.; Innocenti, G.; Tesi, A.
Mostrati risultati da 1 a 9 di 9
Legenda icone
- file ad accesso aperto
- file disponibili sulla rete interna
- file disponibili agli utenti autorizzati
- file disponibili solo agli amministratori
- file sotto embargo
- nessun file disponibile